A Fault Model and a Test Method for Analog Fuzzy Logic Circuits

A nalog circuit implementations of fuzzy logic are characterized by performing logical connectives of analog signals. They can be considered as generalization of digital circuits to a range of logical values, thus forming a special class of analog circuits. The idea of this work is to exploit this relationship for testing. For fault modeling the behavior of faulty fuzzy gates is investigated through simulations of transistor-level failures such as shorts and opens. The deviation fault model is employed on the level of the fuzzy gates and the failures are mapped onto model faults. The resulting deviation fault sets for the fuzzy gates show a close correspondence to the collapsed stuck fault sets for the Boolean gates and, hence, the circuits can be tested w ith binary patterns. A slightly modified five-valued logic which allows for the analog test responses makes possible the use of the test methods for digital circuits. For practical application the use of a digital A TE and BIST by simple on-chip hardware are sketched.